As Moore's Law has been predicting, the capacity of memory cells on silicon for the past 15-20 years has effectively doubled each year. Moore's Law is that every year the amount of structures or gates on a silicon wafer will double, but the price will essentially stay the same. And in some cases, the price will even erode. As these memory cells continue to shrink, the technology is starting to reach a barrier know as the quantum limit, that is, they are actually approaching molecular boundaries, so the cells cannot get any smaller.
Disk drives have been the dominant prime storage in terms of peak capacity, because storing individual domains (magnetic transition sites) on the disk drives unlike semiconductor memory cells disk memory sites do not require connections to get in and out of those domains. Now, in recent history, semiconductor resolutions apply feature geometries with 90 nanometer feature resolutions progressing to 45 and 25 nanometer feature size sizes, with these feature capabilities, the memory cell size, and chip capacity equation changes. Furthermore, certain semiconductor memory technologies have applied a principal of geometric redundancy, where a multiple of data bits may be stored in a single cell. This property of a memory cell to support a multiple of values is sometimes referred to as its dynamic range. To date, memory cells have abilities to support a dynamic range anywhere between 1 and 4 bits, which provides multiples of storage per memory cell. These combined properties of semiconductors have increased capacities and costs, and they are now able to directly compete with disk drives.
Another issue associated with semiconductor memory manufacturing has been the substantial costs of the semiconductor foundries which can run up to more than a billion dollars to establish with amortizing expenses, thereby inflating the unit cost of memory chips. In recent history, this represented price barriers compared with cost per capacity of a disk drive file. Now, with advances in foundry resolutions enabling smaller cell sizes and the geometric redundancy of multiple bit-level per memory cell semiconductor memory is actually cheaper per unit cost, and substantially more rugged in terms of high G forces than memory files on a disk drive.
In Flash memories, there have been improvements in the Moore's Law effect but that has become a diminishing proposition because as the cells started getting smaller and smaller, write cycle limitations and ability to support dynamic ranges are diminished.
So basically, as characterized in recent press review, Flash memory is hit the proverbial wall in increasing data capacity per unit cost, as the quantum limit is approached.
But another issue with Flash memory is its limitations in write speeds. In order to compete with disk drive performance, the memory cells word structure is configured to switch in parallel. Another issue is the number of write cycle limitations the cell will tolerate before it permanently fails. Prior to the substantial reduction in cell size, it was approximately in the range of one million, however, as the foundry feature size resolutions reduced in size, rewrite cycle diminished to approximately 100,000 write cycles. For most non-prime storage applications that may be practical. However, for SRAM and DRAM applications where you're actually exchanging data at substantial repetition rates, several times per microsecond.
Accordingly, what is desired is a memory system and method which overcomes the above-identified problems. The system and method should be easily implemented, cost effective and adaptable to existing storage applications. The present invention addresses such a need.